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Given:

  • Total memory size = 64GB = 2^36 bytes
  • Cache data size = 16MB = 2^24 bytes
  • Word size = 64 bits = 2^3 bytes
  • Cache block size = 16 words = 2^7 bytes

We find:

  • Num cache lines = cache size / block size = 2^24 / 2^7 = 2^17
  • Num bits to address a word in a block = log2(words in a block) = log2(16) = 4
  • Num bits to address a byte in a word = log2(bytes in a word) = log2(8) = 3

If memory is "byte addressable":

  • Address size = 36 bits.
  • 3 bits are used to address the byte in each word.
  • 4 bits are used to address a word in each block.
  • This means there are 36-3-4 = 29 address bits left to keep track of.
    • Num index bits = 17 since there are 2^17 cache lines.
    • Num bits tag = 29-17=12.

If memory is "word addressable":

  • Num words in memory = 64GB/8 bytes = 8Gwords = 2^33 words
  • Address size = 33 bits.
  • 4 bits are used to address a word in each block.
  • This means there are 33-4 = 29 address bits left to keep track of.
  • Num bits tag = 29-17 = 12.

The problem would be different if I had said the address has 36 bits. In that case, byte-addressable and word-addressable would imply different memory sizes. In the above, the memory size is fixed so being byte-addressable or word-addressable doesn't change much other than forcing us to make the last 3 bits of the address 0 in the word-addressable case.